Structural Decision Diagrams in Digital Test
portes grátis
Structural Decision Diagrams in Digital Test
Theory and Applications
Jenihhin, Maksim; Jutman, Artur; Ubar, Raimund; Raik, Jaan
Birkhauser Verlag AG
01/2024
595
Dura
Inglês
9783031447334
15 a 20 dias
Descrição não disponível.
Chapter 1: Introduction.- Chapter 2: Overview of structural decision diagrams.- Chapter 3: Structurally Synthesized Binary Decision Diagrams.- Chapter 4: Fault modeling in digital circuits.- Chapter 5: Logic-level fault simulation.- Chapter 6: Test generation, fault diagnosis and testability.- Chapter 7: High-Level Decision Diagrams.- Chapter 8: Test generation for microprocessors with HLDDs.
Este título pertence ao(s) assunto(s) indicados(s). Para ver outros títulos clique no assunto desejado.
Binary Decision Diagrams;Structural Decision Diagrams for Modeling Digital Circuits;Boolean Algebra Meets Graph-Theory;High-level Decision Diagrams for Modeling Digital Systems;Applications in Test Engineering;Parallel Fault Simulation with Critical Path Backtracing;Multi-valued Simulation for Hazard Detection in Digital Circuits;Test Group Generation for Detecting Multiple Faults;Avoiding Mutual Masking of Multiple Faults;Cross-level Modeling of Faults in Digital Systems;Hierarchical Multi-level Test Generation;Automated Synthesis of Software-based Self-test;Implementation-Independent Testing of Microprocessors
Chapter 1: Introduction.- Chapter 2: Overview of structural decision diagrams.- Chapter 3: Structurally Synthesized Binary Decision Diagrams.- Chapter 4: Fault modeling in digital circuits.- Chapter 5: Logic-level fault simulation.- Chapter 6: Test generation, fault diagnosis and testability.- Chapter 7: High-Level Decision Diagrams.- Chapter 8: Test generation for microprocessors with HLDDs.
Este título pertence ao(s) assunto(s) indicados(s). Para ver outros títulos clique no assunto desejado.
Binary Decision Diagrams;Structural Decision Diagrams for Modeling Digital Circuits;Boolean Algebra Meets Graph-Theory;High-level Decision Diagrams for Modeling Digital Systems;Applications in Test Engineering;Parallel Fault Simulation with Critical Path Backtracing;Multi-valued Simulation for Hazard Detection in Digital Circuits;Test Group Generation for Detecting Multiple Faults;Avoiding Mutual Masking of Multiple Faults;Cross-level Modeling of Faults in Digital Systems;Hierarchical Multi-level Test Generation;Automated Synthesis of Software-based Self-test;Implementation-Independent Testing of Microprocessors
