Advanced Boolean Techniques
portes grátis
Advanced Boolean Techniques
Selected Papers from the 15th International Workshop on Boolean Problems
Drechsler, Rolf; Huhn, Sebastian
Springer International Publishing AG
05/2023
172
Dura
Inglês
9783031289156
15 a 20 dias
Descrição não disponível.
Chapter 1. Arithmetic Satisfiability-Modulo-Theory Solving Applied to Non-Standard Analysis Problems of Cyber-Physical Systems.- Chapter 2. Fast AIG-based Approximate Logic Synthesis.- Chapter 3. External Don't Cares in Logic Synthesis.- Chapter 4. Maiorana-McFarland Boolean Bent Functions Characterized by their Reed-Muller Spectra.- Chapter 5. Towards System-level Assertions for Heterogeneous Systems.- Chapter 6. SAT-based Key Determination Attack for Improving the Quality Assessment of Logic Locking Mechanisms.- Chapter 7. Autosymmetric and D-reducible Functions: Theory and Application to Security.- Chapter 8. Two-operands modular multiplication to small bit-ranges.- Chapter 9. Low Latency Real-Time Inference for Multilayer Perceptrons on FPGAs.- Chapter 10. Thirty-six Officers of Euler - New Insights Computed Using XBOOLE.- Chapter 11. Start Small but Dream Big: On Choosing a Static Variable Order for Multiplier BDDs.
Este título pertence ao(s) assunto(s) indicados(s). Para ver outros títulos clique no assunto desejado.
Logic synthesis;Boolean logic;Boolean algebra;Boolean modeling;Combinatorial search
Chapter 1. Arithmetic Satisfiability-Modulo-Theory Solving Applied to Non-Standard Analysis Problems of Cyber-Physical Systems.- Chapter 2. Fast AIG-based Approximate Logic Synthesis.- Chapter 3. External Don't Cares in Logic Synthesis.- Chapter 4. Maiorana-McFarland Boolean Bent Functions Characterized by their Reed-Muller Spectra.- Chapter 5. Towards System-level Assertions for Heterogeneous Systems.- Chapter 6. SAT-based Key Determination Attack for Improving the Quality Assessment of Logic Locking Mechanisms.- Chapter 7. Autosymmetric and D-reducible Functions: Theory and Application to Security.- Chapter 8. Two-operands modular multiplication to small bit-ranges.- Chapter 9. Low Latency Real-Time Inference for Multilayer Perceptrons on FPGAs.- Chapter 10. Thirty-six Officers of Euler - New Insights Computed Using XBOOLE.- Chapter 11. Start Small but Dream Big: On Choosing a Static Variable Order for Multiplier BDDs.
Este título pertence ao(s) assunto(s) indicados(s). Para ver outros títulos clique no assunto desejado.
